The 5386 Rev D and higher have a Real Time Clock Chip that also has Persistent Memory. There is a test that tests all of the memory but the test would not run without the controller resetting. The reason for this is that the Watch Dog Timer for the processor is also in this chip. It is not possible to reset the timer while at the same time writing the persistent memory. The code was writing too much data at one time in the test. The solution was to write the data in smaller chunks, allowing time for the operating system to have access to reset the Watch Dog Timer.